In accordance to an example scenario, a power converter, such as, for example, a phase shifted full bridge (PSFB) converter, can be used for power conversion in various applications. Examples of the applications can include, but are not limited to, server power supplies, telecom rectifiers, battery charging systems, renewable energy systems, household appliances, industrial textile machines, and compressors. The power converter can be controlled in various modes, such as, for example, a peak current mode control (PCMC). Implementing PCMC in the PSFB converter can involve pulse width modulation (PWM) waveform generation with precise timing control. Such an implementation can be achieved, for example, using a microcontroller integrated with on-chip control peripherals that can include, for example, an analog to digital converter (ADC), analog comparators, a digital to analog converter (DAC), PWM hardware, and programmable slope compensation hardware.
Moreover, one example scenario provides that, in PCMC applications, an analog signal is converted to duty cycle information. Such a conversion is achieved by using an analog comparator that has a finite offset and that compares the analog signal with a ramp signal generated from the DAC. Slope of the ramp signal has to be controlled as the slope affects stability of a control loop of the PCMC applications. The finite offset of the comparator, if constant, does not affect the slope of the ramp signal. A rail-to-rail comparator, however, has a varying offset as a result of a presence of an n-type metal oxide semiconductor (NMOS) input transistor pair and p-type metal oxide semiconductor (PMOS) input transistor pair having different offsets. As a result of the different offsets, an offset changes abruptly at a switch-over point, thereby leading to a slope error in the ramp signal and instability in the control loop of the PCMC applications.